1. Field of the Invention
This invention provides an automatic via creation tool for use with electronic design automation (“EDA”) systems used in integrated circuit design. Specifically, this invention relates to the automatic creation of via connections between overlapping conducting traces when those conducting traces are part of the same net.
2. Related Art
As the complexity, efficiency and robustness requirements in electrical devices like mobile phones, satellite receivers and wireless local area networks increase, more efficient and accurate circuit design of such devices are needed. To reduce product development schedules and make the design work as efficient as possible, it is important to automate this work, too. This design work is often performed by means of computer and associated software in which case the design is stored into the memory of a computer as a virtual representation.
Circuit design typically involves several steps. Usually the design starts with some schematic representation of the circuit that can then be simulated to observe and manipulate the behavior of the design. When the design on a schematic level is found working, a layout of the circuit is produced. The layout is usually a collection of metallizations, routes or traces of other conducting material interconnecting the various electrical components of the circuit design. These conducting traces are fabricated e.g. over and into a printed circuit board, into an integrated circuit or a ceramic slab or other such technology, possibly in several layers.
In designing modern electronic circuits, there are increasing numbers metallization layers that are used to interconnect the various components of the circuit. In RF and high frequency circuits in particular, the interconnect routing and connecting of these components is performed interactively using graphical layout editors. When connecting between two conducting layers or between a conducting layer and the pin of a device, a via or contact structures must be inserted to make an electrical connection between the two. Finding the locations of these connection areas by visual inspection can be very time consuming and error prone for the circuit designer, especially if the circuit contains many components and connections. Once found, creating the via or contact structures to make a connection is also very tedious and error prone. To a circuit designer, it is advantageous to automate the creation of the via structure procedure as much as possible.
Prior art methods of via connection between conducting traces on different layers of an integrated circuit are available commercially in other electronic design automation software, but their design is very limited. In other popular commercial custom electronic layout editors such as Cadence's VirtuosoXL, vias can be inserted between conducting layers, but require a continuous path description and/or an explicit request in order to insert a via into the design. In automatic place and route software such as Magma and Synopsys P&R products, vias are automatically inserted between layers on a continuous routed path. This invention does not require the user to identify the need for or a requirement that the user request insertion a via connection between conducting paths that happen to overlap during the interactive custom layout process. This invention teaches the automatic creation of the via.